In many applications in electronics there is a limit to how fast an output may be slewed based on signal integrity and other constraints (such as, but not limited to, drive capability, capacitive load, overshoot, ringing, etc.). For example, in Registered Dual Inline Memory Modules (RDIMMs) if the output is slewed too fast, signal integrity suffers. This may present a problem.
Often the output (or output transition) of an electronic device is directly related to how fast a register can change state. This register state change is propagated and eventually results in an output (or output transition).
For example, the time required (delay) to propagate a signal from a register clock edge to the output of the register is the sum of the internal register delay and the register output swing delay. This time (delay) may be too long for fast devices (such as, but not limited to next generation RDIMMs, such as DDR2-667 and DDR2-800). This may present a problem.